BUG - Builtin display flashes solid RGB colors after BIOS update (ThinkPad T15 Gen1, Ubuntu 24.04) — VBT panel power-sequencing timings out of spec

Setup: ThinkPad T15 Gen1, Intel-only graphics (CometLake-U GT2 / UHD Graphics), Ubuntu 24.04 LTS, kernel-supplied i915 driver, Mesa 25.2.8.

Problem: After a BIOS/firmware update, the internal eDP panel no longer displays an image. Instead it continuously cycles through solid colors (red, green, blue, white, black), starting immediately at power-on, before the Lenovo boot splash renders, which indicates the fault occurs prior to OS/bootloader handoff. External display via HDMI functions completely normally; disabling the internal panel in display settings lets the system otherwise operate normally on the external monitor only.

Already ruled out (no effect on any of these):

• Reseating the internal display cable

• Reseating RAM

• Full CMOS + main battery disconnect / power-button drain

• BIOS version rollback via vendor update utility

• Emergency pinhole reset

Diagnosis so far:

get-edid/edid-decode confirm the panel's EDID is fully valid (correct checksum, correct manufacturer/model — Innolux N156HCA-EAB — sane detailed timing descriptor matching native 1920x1080@60Hz). This rules out a damaged panel or cable/DDC line.

Extracted the active VBT via:

BDB Block 27 (eDP panel power sequencing) for the active panel entry shows:

Cross-referencing the Innolux N156HCA-EAB manufacturer datasheet's power sequencing spec table:

• T3 max spec: 200ms — VBT value 2000ms (10x over)

• T7 max spec: 50ms — VBT value 2100ms (42x over)

Per the panel spec, the sink is expected to fall back to an internal state if valid video isn't received within the T7 window — consistent with the observed symptom.

Question:

1. Is it possible/safe to override the VBT at boot via i915.vbt_firmware= with a corrected binary (patched T3/T7 values) as a workaround, without a full BIOS reflash? What's the correct process for:

• Locating the exact byte offset of the T3/T7 fields within the raw VBT/BDB block 27 structure

• Recomputing/validating any checksum the VBT structure requires after patching

• Passing the corrected file via kernel parameter at boot (GRUB syntax, initramfs packaging requirements if any)

2. Is there a lower-risk way to force i915 to disregard the VBT's panel power-sequencing values and fall back to generic/default eDP timings, e.g. via a module parameter, without needing a custom VBT blob at all?

Any pointers to the BDB block 27 structure definition (kernel source references, spec documents) would also help me patch this correctly rather than guessing at offsets.